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ADDR=0x00B: SONET/SDH Configuration
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit name Reserved Reserved TX_UNEQ Reserved Reserved TX_SONET RX_SONET_DSCR Reserved
_SCR_INH _INH
R/W ——R/W ——R/W R/W —
Value 000000 0 0
after
reset
Bits 7-6: Reserved
Bit 5: TX_UNEQ is set to generate all zeros in its SPE/VC bytes to create unequipped SPE.
Bits 4-3: Reserved
Bit 2: TX_SONET_SCR_INH is set to disable the HDMP-3001 SONET scrambler.
Bit 1: RX_SONET_DSCR_INH is set to disable the HDMP-3001 SONET descrambler.
Bit 0: Reserved
Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Bit name GPIOCTL7 GPIOCTL6 GPIOCTL5 GPIOCTL4 GPIOCTL3 GPIOCTL2 GPIOCTL1 GPIOCTL0
R/W R/W R/W R/W R/W R/W R/W R/W R/W
Value 0 0000 00 0
after
reset
ADDR=0x00D: GPIO Control
Bit 7: GPIOCTL7: If 0, GPIO15 and GPIO14 are configured as inputs. If 1, GPIO15 and GPIO14 are
configured as outputs.
Bit 6: GPIOCTL6: If 0, GPIO13 and GPIO12 are configured as inputs. If 1, GPIO13 and GPIO12 are
configured as outputs.
Bit 5: GPIOCTL5: If 0, GPIO11 and GPIO10 are configured as inputs. If 1, GPIO11 and GPIO10 are
configured as outputs.
Bit 4: GPIOCTL4: If 0, GPIO9 and GPIO8 are configured as inputs. If 1, GPIO9 and GPIO8 are
configured as outputs.
Bit 3: GPIOCTL3: If 0, GPIO7 and GPIO6 are configured as inputs. If 1, GPIO7 and GPIO6 are
configured as outputs.
Bit 2: GPIOCTL3: If 0, GPIO5 and GPIO4 are configured as inputs. If 1, GPIO5 and GPIO4 are
configured as outputs.
Bit 1: GPIOCTL1: If 0, GPIO3 and GPIO2 are configured as inputs. If 1, GPIO3 and GPIO2 are
configured as outputs.
Bit 0: GPIOCTL0: If 0, GPIO1 and GPIO0 are configured as inputs. If 1, GPIO1 and GPIO0 are
configured as outputs.