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CHAPTER 3 CPU
■ Table Base Register (TBR)
Function of table base register (TBR: Table Base Register) is described.
The table base register (TBR) consists of 32-bit.
Figure 3.3-3 shows the bit configuration of the table base register (TBR).
Figure 3.3-3 Table base register (TBR)
The table base register retains the starting address of the vector table used for EIT processing.
The initial value by reset is 000FFC00
H
.
■ Return Pointer (RP)
Function of Return Pointer (RP: Return Pointer) is described.
The return pointer (RP) consists of 32-bit.
Figure 3.3-4 shows the bit configuration of the return pointer (RP).
Figure 3.3-4 Return pointer (RP)
The address which returns from the sub routine is maintained at the return pointer.
The value of PC is forwarded to this RP at CALL instruction execution time.
The content of RP is forwarded to PC at RET instruction execution time.
The initial value by reset is irregular.
■ System Stack Pointer (SSP)
Function of system stack pointer (SSP: System Stack Pointer) is described.
The system stack pointer (SSP) consists of 32-bit.
Figure 3.3-5 shows the bit configuration of the system stack pointer (SSP).
Figure 3.3-5 System stack pointer (SSP)
SSP is the system stack pointer.
When the S flag is "0", the SSP functions as R15. The SSP can be specified explicitly.
Also used as the stack pointer specifying the stack that saves the PS and PC when EIT occurs.
The initial value by reset is 00000000
H
.
000FFC00
H
31 0 Initial value
bit
XXXXXXXXH
31 0 Initial value
bit
00000000
H
31 0 Initial value
bit