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pin Name pin No. Type max. voltage Function
BLANK 36 Digital-Output Record/non-record detecting/BD detecting output
terminal
WOBSIG 37 Digital-Output WOBBLE signal output terminal
IP2/MIRR 38 Digital-Output ID detection/Mirror detection output terminal
IP1/LPPOUT 39 Digital-Output ID detection/LPP detection output terminal
DFT 40 Digital-Output Defect detection output terminal
GND4 41 Ground Ground connected terminal (Digital)
PORT00 42 Digital-Input/Output VDD I/O Port
PORT01 43 default input mode
PORT02 44 No pull-up
PORT03 45
PORT04 46
PORT05 47
PORT06 48
PORT07 49
MCLK 50 Digital/Analog-Input VDD Main clock input terminal
No pull-up Equalizer fc auto-adjustment control clock input terminal.
LPP output pulse width control clock input terminal.
WOB-BPF f0 auto-tracking clock input terminal.
PORT10 51 Digital-Input/Output VDD I/O Port
PORT11 52 default input mode
PORT12 53 No pull-up
PORT13 54
SCLK 55 Digital-Input pull-up VDD Serial I/F clock input terminal
SDATA 56 Digital-Input/Output pull-up VDD Serial I/F data input/output terminal
SDEN 57 Digital-Input pull-up VDD Serial I/F enable input terminal
MRSTB 58 Digital-Input pull-up VDD Master reset (reversal) input terminal
VDD4 59 Power Power supply connected terminal(3.3V)(digital)
BHC 60 External-capacitor required External capacitor for LPP bottom hold terminal
MIRRHPF 61 External-capacitor required Terminal to connect Mirror envelope detector HPF
capacitor
MIRRBOTH 62 External-capacitor required Terminal to connect Mirror envelope detector bottom
hold capacitor
MIRRTOPH 63 External-capacitor required Terminal to connect Mirror envelope detector top hold
capacitor
BOTH 64 External-capacitor required Terminal to connect envelope bottom hold capacitor
TOPH 65 External-capacitor required Terminal to connect envelope top hold capacitor
GND1 66 Ground Ground connected terminal
EQOP 67 Differential-Output RF equalizer differential output terminal
EQON 68
VDD1 69 Power Power supply connected terminal(3.3V)
SUBI/LPPSIG 70 Analog-Input VDD ID detecting HPF input terminal/LPP detecting HPF input
terminal