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Appendix. Block Diagram for Edge/ALEF Backlight
[ XXLM960V ALEF LED Backlight]
SPI/Vsync
FHD@240Hz
Quad-Link
HF mini-LVDS
8
SoC
TCON
(240Hz)
FRC-III
3D
Chip
Main FRC
LED BLU control
LED BLU control
FHD@60Hz
Dual-Link LVDS For Video
FHD@60Hz
Dual-Link LVDS For OSD
V by One
IC401
LG5812B
IC100
LG1122A
DDR0_DATA[0~15]
IC200 DDR0
TXP 0~7
DDR0_A[0~12]
DDR1_DATA[0~15]
DDR1_A[0~12]
IC201 DDR1
RXAP 0~4
RXAN 0~4
RXBP 0~4
RXBN 0~4
51Pin LVDS
TXN 0~7
80Pin mini LVDS
LLV0~6P/N
LRV0~6P/N
RRV0~6P/N
RRV0~6P/N
Copyright © 2012 LG Electronics. Inc. All rights reserved.
Only for training and service purposes
LGE Internal Use Only
