Panasonic MN103S CRT Television User Manual


 
Chapter 3
Microcomputer Basics 1
8-bit timer operation III39
Timer 1 Binary Counter (TM1BC: 0x0000A151)
Timer 1 Mode Register (TM1MD: 0x0000A141)
Port 3 I/O Control Register (P3DIR: 0x0000A023)
bp Flag name Description
7
6
5
4
3
2
1
0
TM1BC7
TM1BC6
TM1BC5
TM1BC4
TM1BC3
TM1BC2
TM1BC1
TM1BC0
Timer 1 binary counter
bp Flag name Description
7TM1CNE
Timer operation enable
0: Operation disabled
1: Operation enabled
6TM1LDE
Timer initialization
0: Normal operation
1: Initialization
TM1BR value is loaded into TM1BC.
Timer pulse output 1 is reset to low level.
5-3 
2-0
TM1CK2
TM1CK1
TM1CK0
Count source selection
000: IOCLK
001: IOCLK/8
010: IOCLK/32
011: Cascading with Timer 0
100: Timer 0 underflow
101: Setting not available
110: Timer 2 underflow
111: TM1IO pin input
bp Flag name Description
7 
6-0
P36D
P35D
P34D
P33D
P32D
P31D
P30D
P36 to P30 I/O control
0: Input mode
1: Output mode