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BDR-203/BDC-203 Command Reference Manual Version 0.90
Page 32
4.12.2 Mode Pages
The drive is not supported the Parameters Savable (PS) bit and must be set to zero.
The Page Code field identifies the format and parameters defined for that mode page.
The drive supports following Mode pages.
Table 31 - Mode Page Codes
Page code Description Section
01h Error Recovery Page 4.12.2.2 on page 31
05h Write Parameters Page 4.12.2.5 on page 32
08h Caching Page 4.12.2.1 on page 31
0Eh CD Audio Control Page See SFFC INF-8090i document
1Ah Power Condition Page 4.12.2.3 on page 31
1Dh Time-out & Protect Page 4.12.2.4 on page 31
2Ah Capabilities & Mechanical Status Page 4.12.2.6 on page 33
3Fh Return all pages (valid only for the MODE SENSE command)
4.12.2.1 Caching Page
The Caching Page is supported for compatibility of other CD-R/RW drive. This page has no effect on write/read operation. The
returned Caching parameters by the MODE SENSE (10) Command are modified to the new parameters after receiving new
parameters by MODE SENSE (10) Command.
Table 32 - Caching Parameter
Bit
Byte
7 6 5 4 3 2 1 0
0 PS Reserved Page Code = 08h
1 Page Length = 0Ah
2 IC ABPF CAP DISC SIZE WCE MF RCD
3 Demand Read Priority Write Retention Priority
4 (MSB)
5
Disable Pre-fetch Transfer Length
(LSB)
6 (MSB)
7
Minimum Pre-fetch
(LSB)
8 (MSB)
9
Maximum Pre-fetch
(LSB)
10 (MSB)
11
Maximum Pre-fetch Ceiling
(LSB)
Default value of the WCE bit is one. Default value of any other bits and field is zero.
4.12.2.2 Error Recovery Parameters Page
The AWRE and ARRE bits are not supported and are ignored.
The TB, RC, DTE and DCR bits are ignored.
The PER bit and EMCDR field are used to control the defect reporting.
Setting value of the Read Retry Count and the Write Retry Count field are ignored.
4.12.2.3 Power Condition Page
The default value of an Idle bit is one. The default value of the Idle Timer field is 000000c8h (20 second).
The default value of the Standby bit is one. The default value of Standby Timer field is 000012C0h (8 minutes).
4.12.2.4 Time-out & Protect Page
The DISP, SWPP bits are not supported and must be set to 0.
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