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6-2
6-1-1. PLL Circuit
The PLL circuit develops the clock signal synchronized
with the horizontal sync signal, using the horizontal sync
signal entered.
For RGB signals, a highly stable CXA3106 (QX028) is
used. For video signal, a highly traceable TLC2932
(QX029) is used.
6-1-2. Video Signal Format Conversion
The LCD panel used for the unit requires a non-interlace
signal of 65 Hz dot clock entered. Accordingly, all the
RGB signals are converted into XGA 60 Hz format (Dot
clock = 65 MHz). In the same way, the video signal
(interlace signal) is converted into a non-interlace signal
with 64 MHz dot clock in keeping the vertical sync
signal frequency. These processes are carried out by the
newly developed ICs T-FORC (QX207, QX407 and
QX607) and memories (QX202, QX203, QX205,
QX206, QX402, QX403, QX405, QX406, QX602,
QX603, QX605 and QX606).
Furthermore, as the clock of XGA signal reaches approx.
80 MHz (max.), all signal processes are carried out in
parallel for even and odd pixels grouped. The video
signal entered is converted into the digital video signals
for two systems by the A/D converters (QX204, QX401
and QX601).
The signals divided into two systems are processed in
parallel in stages after the digital circuit. In case of the
process carried out in parallel as described above, if the
characteristics between two systems differ, the vertical
stripes will appear on the screen. In order to reduce this
vertical stripes, the signal system used is exchanged for
every one line and one field by the EXCHANGE PLD
(QX207, QX407 and QX607). The signals exchanged are
returned to the original order just before reaching the
LCD panel.
6-1-3. Screen Size Enlargement and Reduction
The pixel number of the LCD panel used for the unit is
1024 x 768 pixels. As for a signal entered, various kinds
of signals are used ranging from 640 x 480 pixels of
VGA signal to 1280 x 1024 pixels of SXGA signal. In
this unit, these signals are displayed on the whole screen
by enlarging/reducing the signals. The enlargement/
reduction process are also carried out by the ICs T-FORC
(QX207, QX407 and QX607) and memories (QX202,
QX203, QX205, QX206, QX402, QX403, QX405,
QX406, QX602, QX603, QX605 and QX606).
6-1-4. Gamma Correction Circuit
The gamma correction is carried out in the digital circuit.
So the digital circuit develops the signal corrected in
gamma.
The gamma correction circuit is built in the T-FORC
(QX207, QX407 and QX607) and the gamma correction
characteristics are set by the microprocessor using a bus.
6-1-5. Panel Driving Timing Signal Generation
The driving for LCD panel requires various kinds of
timing signals. These timing signals are generated in the
digital circuit and especially generated by the timing
generation PLD (QX009).
6-1-6. ON-SCREEN Character Generation
The ON-SCREEN character timing signal is generated
and superimposed inside the digital circuit. So the signal
composed of the ON-SCREEN character is developed
from the digital circuit.
6-1-7. Signal Format Measurement
The RGB signals consist of various kinds of signal
formats, and the timing signal, enlargement ratio and etc.
must be switched corresponding to each signal format.
For this purpose, the signal format identification is
carried out by measuring the HD signal frequency
entered and the line number per 1 frame. This circuit is
built in the SYG (QX004) and the processed result is
read by the microprocessor through the bus line.