1 Hardware Overview 1.1 Features
1-8 PORTEGE A100 Maintenance Manual (960-460)
θ PCI chipset
This gate array incorporates the following elements and functions
• North Bridge (Intel Montara GM)
− CPU interface and control
− DRAM control
− AGP master slave interface (Complies with AGP V2.0)
− PCI interface (Complies with PCI Rev 2.2)
− Built-in graphic (Trident XP)
− 555-ball 35x35mm BGA package
• South Bridge (Intel ICH4-M)
− PCI 3.3V/5V tolerance interface
− Steerable PCI interrupts for PCI device Plug-and-Play
− Enhanced DMA controller
− Interrupt controller
− Counter/timers
− Distributed DMA supported
− PC/PCI DMA supported
− Serial IRQ supported
− Low Pin Count (LPC) host controller
− Plug-and-Play supported
− Built-in KB controller
− ACPI supporting features
− Built-in PCI IDE controller
− USB interface
− SMBus interface
− Super I/O interface
− Audio system
− SW modem interface
− 352-ball (27mm x 27mm) BGA package
θ VGA controller
Included in North Bridge.
