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MAX12557
Dual, 65Msps, 14-Bit, IF/Baseband ADC
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INBP
14-BIT
PIPELINE
ADC
DIGITAL
ERROR
CORRECTION
CHANNEL A
REFERENCE
SYSTEM
COMA
REFAN
REFAP
OV
DD
DAV
OUTPUT
DRIVERS
DORA
CLOCK
DIVIDER
DATA
FORMAT
14-BIT
PIPELINE
ADC
DIGITAL
ERROR
CORRECTION
OUTPUT
DRIVERS
DATA
FORMAT
DIV2
DIV4
INBN
D0B TO D13B
DORB
CHANNEL B
REFERENCE
SYSTEM
COMB
REFBN
REFBP
INAP
INAN
CLKP
CLKN
DUTY-CYCLE
EQUALIZER
CLOCK
CLOCK
POWER
CONTROL
AND
BIAS CIRCUITS
PD
V
DD
GND
CLOCK
REFIN
INTERNAL
REFERENCE
GENERATOR
REFOUT
SHREF
DIFFCLK/SECLK
D0A TO D13A
G/T
MAX12557
T/H
T/H
Figure 2. Functional Diagram