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2.3.2Free-RunModeOperation
2.4ResetConsiderations
2.4.1SoftwareResetConsiderations
2.4.2HardwareResetConsiderations
2.5InterruptSupport
2.5.1InterruptEventsandRequests
2.5.2InterruptMultiplexing
PeripheralArchitecture
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Infree-runmodeoperation,theADCinterfaceperformsA/Dconversioncontinuouslywithoutstopping.
Forfree-runmodeoperation,theADCinterfaceshouldfirstbeconfiguredforscanmode(SCNMD),and
comparatormode(CMPMD)inADCinterfacecontrolregister(ADCTL),alongwithotherconfiguration
options.TheADCinterfacesetstheBUSYbitinADCTLonceitisstartedbywritinga1totheSTARTbit
intheADCTLregister.
Oncestarted,theADCinterfacegenertaestheoutputafterA/Dconversiontime.A/Dconversiontimeis
obtainedbyAnalogswitchsetuptime+ADCsetuptime+A/Dconversiontime.
•Analogswitchsetuptime=PeripheralCLKperiod*(SET_DIV[5:0]+3)*2
•ADCsetuptime=PeripheralCLKperiod*(SET_DIV[15:0]+1)*2
•A/Dconversiontime=PeripheralCLKperiod*(SET_DIV[5:0]+1)*24
WhentheA/Dscanconversionisfinishedforallchannels,theperipheralsendsaninterrupttothesystem
(iftheinterruptisenabledinADCTLregister).Notethatunlikenormalone-shotmodeoperation,another
writetotheSTARTbitisnotrequiredfortheone-shotmodeoperationtostart.OnceA/Dconversionofall
thechannelsisfinishedA/Dconversionre-startfromCH0.
TheADCinterfaceisstoppedduringthefree-runmodeoperationbywriting'0'intoSTARTbit.After
STARTbitturnsto'0',itwillbestopatthecompletionofcurrentsampleconversion.Ifuserchange
configuration,thenuserneedtowaitatleastatimewhichdefinedbySETDIVregisterafterwriting'0'into
STARTbit.TheADCinterfacecanalsostoppedduringthefree-runmodeoperatioorbyreconfiguringitto
one-shotmodeusingtheSCNMDbitinADCTLregister.
Asoftwarereset(suchasaresetgeneratedbytheemulator)causestheADCinterfaceregisterstoreturn
totheirdefaultstateafterreset.
AhardwareresetoftheprocessorcausestheADCinterfaceregisterstoreturntotheirdefaultvaluesafter
reset.
TheADCinterfacegeneratesasinglepulseinterrupt.ThisinterruptistieddirectlytotheAINTC.ADC
interfacegeneratesScanInterrupttoCPUwhenA/Dscanconversionisfinishedforallchannelsonce.
ThecauseofcomparatorinterruptisselectedaccordingtotheCMPMDbitinADCTLregister.Asingle
commoncomparativedatawindowhasprovidedforeveryindividualchannel.Dependingonthe
ComparatormodeselectedaninterruptoccursaftertheA/Dconversionineachchannelforeitherofthe
followingcondition.
•Conversiondataisoutoftherangeofthecomparativedatawindow
•Conversiondataiswithintherangeofthecomparativedatawindow
TheADCinterfaceissupportedbytheARMInterruptController(AINTC)module.TheARM_INTMUX
registerinthesystemcontrolmodulemustbeusedtoselecttheinterruptsourceformultiplexedinterrupts.
Inparticular,theADCinterfaceinterruptismultiplexedwithotherinterrupts.RefertotheTMS320DM365
DigitalMediaSystem-on-Chip(DMSoC)ARMSubsystemReferenceGuide(SPRUFG5)formore
informationontheSystemControlModuleandARMInterruptController.
10AnalogtoDigitalConverter(ADC)InterfaceSPRUFI7–March2009
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