Texas Instruments TMS320DM36x TV Converter Box User Manual


 
1.2IndustryComplianceStatement
2PeripheralArchitecture
2.1ClockControl
2.2SignalDescriptions
2.3FunctionalOperation
2.3.1One-ShotModeOperation
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PeripheralArchitecture
TheADCinterfacedoesnotconformtoanyrecognizedindustrystandards.
TheADCinterfaceisdrivenbytheauxiliaryclockofthePLLcontroller.Thefrequencyoftheauxiliary
clockisequaltotheinputreferenceclockofthePLLcontroller,andthereforeisnotaffectedbythe
multiplieranddividervaluesofthePLLcontroller.Formoreinformationondeviceclocking,refertothe
TMS320DM365DigitalMediaSystem-on-Chip(DMSoC)ARMSubsystemReferenceGuide(SPRUFG5).
TheADCinterfacereceivesanaloginputsonsixseparatepins:ADC_CH[5:0].Refertothe
TMS320DM365DigitalMediaSystem-on-ChipDataManual(SPRS457)formoreinformationonthese
pins.
TheADCinterfacecanoperateineitherone-shotmodeorfree-runmode.Inbothmodes,theADC
peripheralhasaComparisonA/DLowerdataregister(CMPLDAT)andaComparisonA/DUpperdata
register(CMPUDAT)tospecify,respectively,thelowerandupperdataforcomparison.Theanaloginput
channeltobeusedforscanconversioncanbeconfiguredusingtheCHSELregistersandonthe
CMPTGTregister,settheanaloginputdatatobethetargetofcomparator.Forone-shotmodeoperation,
seeSection2.3.1;forFree-Runmodeoperation,seeSection2.3.2.
Inone-shotmodeoperation,theADCinterfacedoesnotruncontinuouslyandA/Dconversionterminates
whenscanningiscompleted.
Forone-shotmodeoperation,theADCinterfaceshouldfirstbeconfiguredforscanmode(SCNMD)and
comparatormode(CMPMD)inADCinterfacecontrolregister(ADCTL),alongwithotherconfiguration
options.TheADCinterfacesetstheBUSYbitinADCTLonceitisstartedbywritinga1totheSTARTbit
intheADCTLregister
Oncestarted,theADCinterfacegenertaestheoutputafterA/Dconversiontime.A/Dconversiontimeis
obtainedbyAnalogswitchsetuptime+ADCsetuptime+A/Dconversiontime.
Analogswitchsetuptime=PeripheralCLKperiod*(SET_DIV[5:0]+3)*2
ADCsetuptime=PeripheralCLKperiod*(SET_DIV[15:0]+1)*2
A/Dconversiontime=PeripheralCLKperiod*(SET_DIV[5:0]+1)*24
WhentheA/Dscanconversionisfinishedforallchannels,theperipheralsendsaninterrupttothesystem
(iftheinterruptisenabledinADCTLregister).TheSTARTbitwillclearedautomaticallywhenA/D
conversioninOne-Shotmodeterminates.TheADCinterfacethenbecomesinactiveuntiltheSTARTbitis
writtena1again.
TheADCInterfaceisstoppedduringone-shotmodeoperationbychangingtheSTARTbitto0inADCTL.
AfterSTARTbitturnsto'0',itwillbestopatthecompletionofcurrentsampleconversion.Ifuserchange
configuration,thenuserneedtowaitatleastatimewhichdefinedbySETDIVregisterafterwriting'0'into
STARTbit.
SPRUFI7March2009AnalogtoDigitalConverter(ADC)Interface9
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