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CM71-00105-1E FUJITSU MICROELECTRONICS LIMITED 269
FR81 Family
CHAPTER 7 DETAILED EXECUTION INSTRUCTIONS
7.91
7.91 FSUBs (Single Precision Floating Point Subtract)
FRk is subtracted by FRj, and its result is stored in FRi.
Assembler Format
FSUBs FRk, FRj, FRi
Operation
FRk - FRj FRi
Classification
Single-precision floating point instruction, FR81 family
Execution Cycles
1 cycle
Instruction Format
EIT Occurrence and Detection
An invalid instruction exception (FPU absence error), an FPU exception, or an interrupt is detected.
MSB LSB
(n+0)0000011110100010
(n+2) - FRk FRj FRi