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MELSEC-Q
APPENDICES
Special Register List (Continued)
Number Name Meaning Explanation
Set by
(When
set)
Corresponding
ACPU
D9
Corresponding
CPU
SD5
Error
common
information
Error common
information
3
Time (value set)
Number
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
Meaning
Time : 1
s units (0 to 999
s)
(Empty)
Time : 1 ms units (0 to 65535 ms)
4 Program error location
Number
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
Meaning
2E
H(.)
File name
(ASCII code: 8 characters)
Extension
(ASCII code: 3 characters)
Pattern
Block No.
Step No./transition No.
Sequence step No. (L)
Sequence step No. (H)
1
2
2: The description of the bit pattern is as follows:
SFC block designation present
(1)/absent (0)
0000 to
0123415 14 to
SFC step designation present
(1)/absent (0)
SFC transition designation
present (1)/absent (0)
(Not used)
(Bit number)
S (Error) New
Rem
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
5
Reason(s) for system switching
System switching direction (0:standby system to
control system/ 1: control system to standby system)
Number
SD5
SD6
SD7
SD8
SD9
SD10
SD11
SD12
SD13
SD14
SD15
Meaning
System switching cause (0: automatic system
switching/ 1: manual system switching)
(Empty)
Tracking flag
3
3: Stored value of the tracking flag
Whether the tracking data is enabled or disabled can be set.
Invalid work data
invalid (0) /valid (1)
0000
to
0123415 14 to
System data
(SFC active step information)
invalid (0)/ valid (1)
System switching cause
invalid (0)/ valid (1)
(Not used)
(Bit number)
S (Error) New Q4AR
1: For extensions, refer to 6.