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CHAPTER 14 16-BIT RELOAD TIMER
14.6 Precautions when Using 16-bit Reload Timer
This section explains the precautions when using the 16-bit reload timer.
■ Precautions when Using 16-bit Reload Timer
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Precautions when setting by program
• Set the 16-bit reload register (TMRLR) after disabling the timer operation (TMCSR:CNTE = 0)
• The 16-bit timer register (TMR) can be read during the TMR count operation. However, always use the
word instruction.
• Change the CSL1 and CSL0 bits in the TMCSR after disabling the timer operation (TMCSR:CNTE = 0)
●
Precautions on interrupt
• When the UF bit in the TMCSR is set to 1 and the underflow interrupt output is enabled (TMCSR:INTE
= 1), it is impossible to return from interrupt processing. Always clear the UF bit. However, when the
EI
2
OS is used, the UF bit is cleared automatically.
• When using the EI
2
OS in the 16-bit reload timer, it is necessary to disable the interrupt of the 16-bit
reload timer that shares the interrupt control register (ICR).
