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39 Appendix C
C.8 Interrupt Control Register
1. C1 to C0: Counter Interrupt enable Bit
0
= Not enable interrupt for this counter
1 = Enable interrupt for this counter
2. DIA, DIB and DIC: DI Interrupt enable Bit
0
= Not enable interrupt for DI
1 = Enable interrupt for DI
C.9 Interrupt Status Register
1. C1 to C0: Counter Interrupt Status Bit
0
= No interrupt occur
1 = Interrupt occur
2. DIA, DIB and DIC: Interrupt Status Bit
0
= No interrupt occurred
1 = Interrupt occured
Base
Address +
HEX
PCM-3780 Register Format
151413121110987654 3 2 10
22h W Interrupt Control Register
DIC DIB DIA C1 C0
R
Base
Address
+ HEX
PCM-3780 Register Format
151413121110987654 3 2 1 0
22h W
R Interrupt Status Register
DIC DIB DIA C1 C0