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53 Appendix D
D.8 Mode G Waveforms
Software-Triggered Delayed Pulse One-Shot
In Mode G, the gate does not affect the counter's operation. Once armed,
the counter will count to TC twice and then automatically disarm itself.
For most applications, the counter will initially be loaded from the
Load
register either by a LOAD command or by the last TC of an earlier timing
cycle.
Upon counting to the first TC, the counter will reload itself from the
Hold
register. Counting will proceed until the second TC, when the counter
will reload itself from the
Load register and automatically disarm itself,
inhibiting further counting. Counting can be resumed by issuing a new
ARM command.
Specifying the TC Toggled output mode in the Counter Mode register
may generate a software-triggered delayed pulse one-shot. The initial
counter contends control of the delay from the ARM command until the
output pulse starts. The
Hold register contents control the pulse duration.
SOURCE
WR
ARM
COMMAND
COUNT
VALUE
TC OUTPUT
TC TOGGLED
OUTPUT
L L-1 L-2 2X 0 H H-2 1
Mode G Waveforms
1 H-1 2 0 L