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5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
MUX_SEL_P
CYX
HI_A19
CPU_WR_N
CPU_WR_N
CPU_RD_N
CPU_RD_N
CPU_LCS_N
CPU_ARDY
CPU_MCS2_N
CPU_D[0..7]
RESET_N
CPU_RXD0
CPU_X1
PIO20
CPU_S1
MUX_BUFFER_1
CPU_RD_N
CPU_LCS_N
CPU_PCS0_N
PIO4
CPU_S2
CPU_MCS1_N
CPU_TMRIN0
CPU_WR_N
CPU_NMI
CPU_TXD0
PIO5
CPU_CLKOUTA
CPU_HLDA
CPU_BHE_N
CPU_X2
CPU_TMRIN1
CPU_BHE_N
RM1_CS_N
SDA
CPU_S0
CPU_HOLD
SDA
SCL
CPU_DELAY1CPU_DELAY2
RM1_IRQ
CPU_INT1
CPU_UCS_N
ANTI_CLKDIV_1
PIO_PORT
PIO1
ANTI_CLKDIV
MUX_BUFFER
CPU_ALE
CPU_UZI
CPU_CLKOUTB
CPU_WLB
CPU_WHB
INT4
CPU_BHE_N
CPU_RXD1
SDA
SCL
RM1_CS_N
CPU_S1
CPU_HLDA
CPU_HOLD
CPU_S2
CPU_S0
CPU_TXD0
RESETVCC
CPU_LCS_N
CPU_RXD0
CPU_TXD1
FLASH1_CE
CPU_D6
CPU_D14
CPU_D0
CPU_D0
CPU_D9
CPU_D15
CPU_D5
CPU_D4
CPU_D2
CPU_D1
CPU_D12
CPU_D14
CPU_D14
CPU_D8
CPU_D2
CPU_D2
CPU_WR_N
CPU_WR_N
CPU_D10
CPU_D12
CPU_D13
CPU_D13
CPU_D1
CPU_D[0..15]
CPU_D8
CPU_D6
CPU_D14
CPU_D7
CPU_D2
CPU_D1
CPU_MCS3_N
CPU_D9
CPU_D11
CPU_D8 CPU_D4
CPU_MCS2_N
RM1_IRQ
CPU_D12
CPU_D5
CPU_D7
CPU_D3
CPU_UCS_N
CPU_D[0..15]
CPU_D6
CPU_D6
CPU_D7
CPU_D2
CPU_D11
CPU_D5
CPU_D6
CPU_D7
CPU_D3
POWERON_TEST
CPU_D0
CPU_D0
CPU_D3
CPU_MCS3_N
RM1CLKIN
CPU_D15
CPU_D5
CPU_D13
CPU_D10
CPU_D7
CPU_D9
CPU_D5
CPU_D10
CPU_D8
CPU_D9
CPU_D4
CPU_D12
CPU_D11
CPU_D3
CPU_D15
CPU_D11
CPU_D3
CPU_UCS_N
FLASH1_CE
RESET_N
CPU_MCS1_N
CPU_D10
CPU_D0
CPU_D4
CPU_D4
CPU_D1
CPU_D13
CPU_D15
CPU_D1
CPU_RD_N
INT0
INT2
IR_IN
CPU_TXD1
CPU_RXD1
SCL
CPU_A9
CPU_A4
CPU_A12
CPU_A1
CPU_A16
CPU_A8
CPU_A7
CPU_A5CPU_A15
CPU_A2
CPU_A17
CPU_A19
CPU_A[0..19]
CPU_A13
CPU_A18
CPU_A4
CPU_A7
CPU_A17 CPU_A1
CPU_A1
CPU_A13
CPU_A4
CPU_A5
CPU_A11
CPU_A17
CPU_A15
CPU_A2
CPU_A6
CPU_A12
CPU_A1
CPU_A9
CPU_A14
CPU_A13
CPU_A0
CPU_A3
CPU_A3
CPU_A12
CPU_A10
CPU_A10
CPU_A2
CPU_A18
CPU_A5
CPU_A16
CPU_A10
CPU_A16
CPU_A0
CPU_A3
CPU_A6
CPU_A6
CPU_A10
CPU_A13
CPU_A9
CPU_A4
CPU_A17
CPU_A15
CPU_A2
CPU_A2
CPU_A14
CPU_A7
CPU_A11
CPU_A19
CPU_A6
CPU_A4
CPU_A8
CPU_A7
CPU_A5
CPU_A15
CPU_A3
CPU_A14
CPU_A8
CPU_A8
CPU_A11
CPU_A19
CPU_A1
CPU_A[0..19]
CPU_A3
CPU_A6
CPU_A18
CPU_A11
CPU_A0
CPU_A12
CPU_A14
CPU_A9
CPU_A18
CPU_A16
CPU_A7
CPU_A5
CPU_A0
PIO17_1
WRITE_PROT
PIO17_2
PIO19
SYNVAL
POWERON_TEST
CPU_TXD0
CPU_RXD0
CPU_PCS0_N
MUX_SEL_Q
POWER
MUX_BUFFER
CPU_WR_N
CPU_RD_N
RM1CLKIN
RM1_IRQ
CPU_D[0..7]
RESET_N
RM1_CS_N
SCL
FAN_CTRL
RM1_WR_N
KEY_LED1
SDA
KEY_LED0
KEY_LED2
IR
RESETVCC
+5VS
+3VS
+12VA
+5VA
+3VA
CPU_A[0..7]
MUX_SEL_P
BACKLIGHT_CTRL
LAMPLIT
WRITE_PROT
DLP_RST
SYNCVALID
BALLAST_CTRL
DMD_SCL
DMD_SDA
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+5VS
+5VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
+3VS
Title
Size Document Number Rev.
Date: Sheet
of
Project Code
Reviewed By Approved By
Prepared By
Model Name
PCB P/N
PCB Rev.
Benq Corporation
OEM/ODM Model Name
99.J5877.R22-C3-304-001
MAIN BOARD
7
10
COLIN CHANG BEN CHEN
48.J5801.S02
S02
ANGEL HU
<Size>
HT720G
99.J5877.001
0
Thursday, January 16, 2003
NA
(PIO21)
(PIO20)
(PIO2)
(PIO12)
(PIO13)
(PIO10)
(PIO1)
(PIO4)
(PIO6)
(PIO19)
(PIO18)
(PIO17)
(PIO5)
(INT1)
Note: Infra-Red generates two interrupts: at the rising edge and at the falling edge,
for IR signal decoding.
(PIO29)
(PIO21)
Note: Instead of KM616V1000B,
IS61LV25616-12T (256K x 16 bit
4M) can be stuffed for debug.
(256K x 16Bit FLASH)
(PIO20)
(128KBytes SRAM)
The RM1_WR_N is
delayed by 2 gates
because the data
should be stable
during the falling
edge of the WRITE
signal.
Link to test
board.
R43
NC_R0603
R38 33
C87
0.1UF
C76
20PF
C75
20PF
L6
Z1000/100MHZ
R115
5.1K
R119
33
U6
AT24C16
NC
1
NC
2
NC
3
GND
4
SDA
5
SCL
6
WP
7
VCC
8
R123
0
TP40
E1
1
TP37E1
1
R55
5.1K
U7C
74VHC32
9
10
8
147
R74 33
R44
5.1K
R69
10K
R68
NC_R0603
R71 33
R41
10K
R70
33
R61 0
R621K
R105
2K
R39
10K
R36
2K
U10
RDC8820
AD0
78
AD8
79
AD1
80
AD9
81
AD2
82
AD10
83
AD3
84
AD11
85
AD4
86
AD12
87
AD5
88
GND
89
AD13
90
AD6
91
VCC
92
AD14
93
AD7
94
AD15
95
S6/LOCK/CLKDIV2
96
UZI
97
TXD1
98
RXD1
99
CTS0/ENRX0
100
RXD0
1
TXD0
2
RTS0/RTR0
3
BHE/ADEN
4
WR
5
RD
6
ALE
7
ARDY
8
S2
9
S1
10
S0
11
GND
12
X1
13
X2
14
VCC
15
CLKOUTA
16
CLKOUTB
17
GND
18
A19
19
A18
20
VCC
21
A17
22
A16
23
A15
24
A14
25
A13
26
A12
27
A11
28
A10
29
A9
30
A8
31
A7
32
A6
33
A5
34
A4
35
A3
36
A2
37
VCC
38
A1
39
A0
40
GND
41
WHB
42
WLB
43
HLDA
44
HOLD
45
SRDY
46
NMI
47
DT/R
48
DEN/DS
49
MCS0
50
MCS1
51
INT4
52
INT3/INTA1/IRQ
53
INT2/INTA0/PWD
54
INT1/SELECT
55
INT0
56
UCS/ONCE1
57
LCS/ONCE0
58
PCS6/A2
59
PCS5/A1
60
VCC
61
PCS3/RTS1/RTR1
62
PCS2/CTS1/ENRX1
63
GND
64
PCS1
65
PCS0
66
VCC
67
MCS2
68
MCS3/RFSH
69
GND
70
RES
71
TMRIN1/PIO0
72
TMROUT1
73
TMROUT0
74
TMRIN0
75
DRQ1/INT6
76
DRQ0/INT5
77
Q28
2N2907
3
1
2
C72
470PF
C83
0.1UF
R49
33
TP42E1
1
TP41
E1
1
C81
0.1UF
R50 33
U8A
74HC132
1
2
3
147
R37
2K
R45
5.1K
R47
10K
R54
NC_R0603
C78
0.1UF
R35
5.1K
U7B
74VHC32
4
5
6
147
C82
0.1UF
R48
10K
R46
5.1K
U9
IS61LV25616-12T
A4
1
A3
2
A2
3
A1
4
A0
5
CS#
6
I/O1
7
I/O2
8
I/O3
9
I/O4
10
VCC
11
VSS
12
I/O5
13
I/O6
14
I/O7
15
I/O8
16
WE#
17
A15
18
A14
19
A13
20
A12
21
NC
22
NC
23
A11
24
A10
25
A9
26
A8
27
NC
28
I/O9
29
I/O10
30
I/O11
31
I/O12
32
VCC
33
VSS
34
I/O13
35
I/O14
36
I/O15
37
I/O16
38
LB#
39
UB#
40
OE#
41
A7
42
A6
43
A5
44
R51 33
C80
0.1UF
R52 2K
R58 33
R40
10K
C79
0.1UF
TP44
E1
1
R53 33
U12
AM29LV160DT-90EI
A15
1
A14
2
A13
3
A12
4
A11
5
A10
6
A9
7
A8
8
A19
9
NC
10
WE#
11
RESET#
12
NC
13
NC
14
RY/BY#
15
A18
16
A17
17
A7
18
A6
19
A5
20
A4
21
A3
22
A2
23
A1
24
A0
25
CE#
26
VSS
27
OE#
28
DQ0
29
DQ8
30
DQ1
31
DQ9
32
DQ2
33
DQ10
34
DQ3
35
DQ11
36
VCC
37
DQ4
38
DQ12
39
DQ5
40
DQ13
41
DQ6
42
DQ14
43
DQ7
44
DQ15/A-1
45
VSS
46
BYTE#
47
A16
48
+
C77
22UF/16
J3
AMP 80PIN D0.6
1
1
2
2
3
3
4
4
5
5
6
6
7
7
8
8
9
9
10
10
11
11
12
12
13
13
14
14
15
15
16
16
17
17
18
18
19
19
20
20
21
21
22
22
23
23
24
24
25
25
26
26
27
27
28
28
29
29
30
30
31
31
32
32
33
33
34
34
35
35
36
36
37
37
38
38
39
39
40
40
41
41
42
42
43
43
44
44
45
45
46
46
47
47
48
48
49
49
50
50
51
51
52
52
53
53
54
54
55
55
56
56
57
57
58
58
59
59
60
60
61
61
62
62
63
63
64
64
65
65
66
66
67
67
68
68
69
69
70
70
71
71
72
72
73
73
74
74
75
75
76
76
77
77
78
78
79
79
80
80
R56
5.1K
R59 33
R60 33
C84
0.1UF
R57
NC_0603
R67
1M
TP45
1
C85
0.1UF
R63
10K
C86
0.1UF
TP43
E1
1
X2
25MHZ
13
24
R114
5.1K
R65
10K
R42
10K
R72 33
R73 33
R117
33
R122
0