Daewoo CP-885 CRT Television User Manual


 
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Service manual WP 895/895F, CP885/885F
5-3-15 CRT Measurement and Control
The display processor is equipped with an 8-bit ADC for all measuring purposes. The ADC is connected to the
SENSE input pin. Cutoff and white-drive current measurement are carried out during the vertical blanking interval.
5-3-16 Average Beam Current Limiter
The average beam current limiter (BCL) uses the SENSE input for the beam current measurement. The BCL uses a
different filter to average the beam current during the active picture. The filter bandwidth is approx. 2 kHz. The beam
current limiter has an automatic offset adjustment that is active two lines before the first cutoff measurement line. The
beam current limiter function is located in the front-end. The data exchange between the front-end and the back-end is
done via a single-wire serial interface. The beam current limiter allows the setting of a thresh-old current. If the beam
current is above the threshold, the excess current is low-pass filtered and used to attenuate the RGB outputs by
adjusting the white-drive multipliers for the internal (digital) RGB signals, and the analogue contrast multipliers for the
analogue RGB inputs, respectively. The lower limit of the attenuator is programmable, thus a minimum contrast can
always be set. During the tube measurement, the ABL attenuation is switched off. After the white-drive measurement
line it takes 3 lines to switch back to BCL limited drives and brightness.
5-3-17 Analogue RGB Insertion
The VCT 38xxA allows insertion of external analogue RGB signals. The RGB signal is key-clamped and inserted into
the main RGB by the Fast-Blank switch. The external RGB input can be overlaid or underlaid to the digital picture.
The external RGB signals can be adjusted independently as regards DC level (brightness) and magnitude (contrast). All
signals for analogue RGB insertion (RIN, GIN, BIN, FBLIN) must be synchronised to the horizontal flyback, other-
wise a horizontal jitter will be visible. The VCT 38xxA has no means for timing correction of the analogue RGB input
signals. RGB signals are not digitalised and therefore cannot be processed by the picture scaler.
5-3-18 Fast-Blank Monitor
The presence of external analog RGB sources can be detected by means of a Fast-Blank monitor. With a special
monitor logic it is possible to detect if there is an external RGB source active and if it is a full screen insertion or only
a box. The monitor logic is connected directly to the FBLIN pin. The controlling software uses this information to
disable all picture format using display scaler.
5-3-19 Vertical and East/West Deflection
The calculations of the vertical and East/West deflection waveforms is done by the internal Fast Processor (FP).
The algorithm uses a chain of accumulators to generate the required polynomial waveforms. To produce the deflection
waveforms, the accumulators are initialised at the beginning of each field. The initialisation values must be computed
by the TV control processor and ar e written to the front-end once.