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HYUNDAI MicroElectronics GMS90X5XC Series
40 Jan. 2001 Ver 1.0
Figure 7. External Data Memory Read Cycle
Figure 8. External Data Memory Write Cycle
t
LHLL
P2.0-P2.7 or A8-A15 from DPH
A8-A15 from PCH
ALE
PSEN
PORT 0
PORT 2
RD
t
LLWL
DATA IN A0-A7 from PCL INSTR. IN
A0-A7 from
t
LLAX2
t
AVWL
t
AVLL
t
AVDV
t
RLAZ
t
LLDV
t
RLRH
t
RLDV
t
RHDX
t
RHDZ
t
WHLH
RI or DPL
t
LHLL
P2.0-P2.7 or A8-A15 from DPH
A8-A15 from PCH
ALE
PSEN
PORT 0
PORT 2
WR
t
LLWL
DATA OUT
A0-A7 from PCL
INSTR. IN
A0-A7 from
t
LLAX2
t
AVWL
t
AVLL
t
WLWH
t
WHQX
t
WHLH
RI or DPL
t
QVWX
t
QVWH