Daewoo 21T2 CRT Television User Manual


 
10
Controller:
- 8 bit configuration
- 18 MHz internal clock
- 0.33 us instruction cycle
- eight 16-bit data pointer registers (DPTR)
- two 16-bit timers
- watchdog timer
- serial interface (UART)
- 256 bytes on-chip RAM
- 1 Kbyte on-chip extended RAM (access via MOVX)
- 8 Kbyte on-chip ACQ-buffer-RAM (access via MOVX)
- 6 channel 8-bit pulse width modulation unit
- 2 channel 14-bit pulse width modulation unit
- 4 multiplexed ADC inputs with 8-bit resolution
- one 8-bit I/O port with open drain output and optional I2C emulation
- two 8-bit multifunctional I/O ports
- one 4-bit port working as digital or analog inputs
- one 2-bit I/O port with optional address latch enable function
P-SDIP 52 package
5 V supply voltage
(3) Block Diagram