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CHAPTER 4: Operation
17
If SW3, Switch #7 is OFF, the A/S-2G will send an X-OFF (ASCII DC3, 13 Hex) to the asynchronous device
when RAM reaches a nearly-full state. This prevents data from being lost due to a buffer overrun. When
RAM space is available, the A/S-2G will send an X-ON (ASCII DC1, 11 Hex) to resume transmission.
Alternatively, if SW3, Switch #7 is ON, the A/S-2G will lower the DTR (Pin 20) when RAM reaches a
nearly-full state. When RAM space is available, the A/S-2G will again raise DTR to resume transmission.
4.1.7 PRESENTATION OF DATA FROM A/S-2G TO SYNCHRONOUS DEVICE
When an asynchronous device begins transmission to the A/S-2G and the A/S-2G has enough data for
a block, the A/S-2G bids for the synchronous line and proceeds in standard bisynchronous protocol.
See the Data Flow Diagrams on pages 15 through 19.
NOTE
Bracketed sections indicate a selectable option. Arrows indicate the direction of data flow.
4.1.8 VERIFICATION OF DATA RECEPTION
When operating in full duplex mode from the asynchronous side, SW3, Switches #1 and #2 permit visual
assurance of accurate and complete transmission. When SW3, Switch #1 is ON, the A/S-2G will
immediately echo back all the data it receives from the asynchronous device. When SW3, Switch #2 is
ON, the A/S-2G will send a CR, LF, and EOT to the asynchronous device after a complete transmission
and a line turn-around have successfully been completed.
4.1.9 LINE TURNAROUND
The final record transmitted from the asynchronous side must be terminated with a “Control D” (ASCII
04 Hex) character. This notifies the A/S-2G that the asynchronous device has completed its entry and is
relinquishing the line. After all data is sent, the A/S-2G will send an EOT sequence to the synchronous
side.
Data Flow — A/S-2G to Synchronous Device
Bisynchronous Device A/S-2G Converter Asynchronous Device
Characters up to maximum
BSC Block size (2770, 2780,
3780) or one 128 character
record (3741) terminated by
CR (0D Hex) = Block A of
data received in start/stop
format
(Echo all but CR LF)
Line Bid
AA AA 32 32 32 32 2D FF FF
ACK 0
Positive Acknowledgment—
Even AA AA 32 32 32 32 10
70 FF FF
ENQ
Send block A