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CONFIDENTIAL – DO NOT COPY
Page 7-42
File No. SG-0198
If RESET is asserted during a program or erase operation, the RY/BY pin remains a "0" (busy) until
the internal reset operation is complete, which requires a time of tREADY (during Embedded
Algorithms). The system can thus monitor RY/BY to determine whether the reset operation is
complete. If RESET is asserted when a program or erase operation is not executing (RY/BY pin is
"1"), the reset operation is completed within a time of tREADY (not during Embedded Algorithms).
The system can read data tRH after the RESET pin returns to VIH. Refer to the AC Characteristics
tables for RESET parameters and to Figure 14 for the timing diagram.
WRITE PROTECT (WP)
The write protect function provides a hardware method to protect boot sectors without using VID.
If the system asserts VIL on the WP/ACC pin, the device disables program and erase functions in
the two "outermost" 8 Kbyte boot sectors independently of whether those sectors were protected or
unprotected using the method described in Sector/Sector Group Protection and Chip Unprotection".
The two outermost 8 Kbyte boot sectors are the two sectors containing the lowest addresses in a
bottom-boot-configured device, or the two sectors containing the highest addresses in a
top-boot-configured device.
If the system asserts VIH on the WP/ACC pin, the device reverts to whether the two outermost 8K
Byte boot sectors were last set to be protected or unprotected. That is, sector protection or
unprotection for these two sectors depends on whether they were last protected or unprotected
using the method described in "Sector/Sector Group Protection and Chip Unprotection".
Note that the WP/ACC pin must not be left floating or unconnected; inconsistent behavior of the
device may result.
SOFTWARE COMMAND DEFINITIONS :
Device operations are selected by writing specific address and data sequences into the command
register. Writing incorrect address and data values or writing them in the improper sequence will
reset the device to the read mode. Table 3 defines the valid register command sequences. Note that
the Erase Suspend (B0H) and Erase Resume (30H) commands are valid only while the Sector
Erase operation is in progress. Either of the two reset command sequences will reset the device
(whenapplicable).
All addresses are latched on the falling edge of WE or CE, whichever happens later. All data are
latched on rising edge of WE or CE, whichever happens first.