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Using System Designer
4-12 FPSLIC STK594 User Guide
2819A–FPSLI–07/02
Figure 4-17.
Control Register Settings Dialog
5. Press
OK
to generate the combined bitstream file.
Note:
It is possible to generate a bitstream for only the FPGA or AVR as you may only
want to program that portion of the FPSLIC device. To include only the AVR
HEX file, simply uncheck the Include FPGA Bitstream box. Programming only
the FPGA portion can be done in a similar fashion.
4.10 Programming
and Design
Execution
The programming file generated by the Bitstream Generator is used to program the con-
figuration memory. When the FPSLIC requests configuration data after a Reset or
Power-On-Reset, the data is clocked out serially.
4.10.1 Hardware Setup Before programming the configurator and verifying the tutorial design, a few prepara-
tions need to be performed prior to its execution on hardware.
1. Connect the PC’s parallel port to the 25-pin connector of the ATDH2225 Pro-
gramming Dongle.
2. Connect the 10-pin ISP header on the STK594 to the 10-pin ribbon cable of the
ATDH2225. The ATDH2225 is keyed to assure proper orientation, see Figure 4-
18.