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Philips Semiconductors
TDA8752B
Triple high-speed Analog-to-Digital Converter 110 Msps
Product specification Rev. 03 — 21 July 2000 16 of 38
9397 750 07338
© Philips Electronics N.V. 2000. All rights reserved.
8.7 I
2
C-bus and 3-wire serial bus interface
The I
2
C-bus and 3-wire serial buses control the status of the different control DACs
and registers. Control pin DIS enables or disables the full serial interface function
(disable at HIGH level). Four ICs can be used in the same system and programmed
by the same bus. Therefore, two pins (ADD1 and ADD2) are available to set each
address respectively, for use with the I
2
C-bus interface. All programming is described
in Section 9 “I
2
C-bus and 3-wire serial bus interfaces”.
Slave at 180 deg phase shift with respect to pin CKADCO of the master TDA8752B.
Fig 9. Dual TDA8752B solution for pixel clock rate with a single phase adjustment (100 to 200 MHz).
FCE466
I
2
C-bus;
1 bit (Ckb)
(Ckb = 1)
phase selector A
I
2
C-bus;
5 bits (Pa)
I
2
C-bus;
1 bit (Cka)
(Cka = 1)
CLKADC
12 to
100 MHz
PLL
Master TDA8752B
(even pixels)
0 /180
MUX
SYNCHRO
COAST CKEXT INV
CKADCO
CKAO
CKREFO
CKREF
phase selector B
I
2
C-bus; 5 bits (Pb)
CKBO
I
2
C-bus;
1 bit (Ckb)
(Ckb = 0)
phase selector A
I
2
C-bus;
5 bits (Pa)
I
2
C-bus;
1 bit (Cka)
(Cka = 1)
CLKADC
12 to
100 MHz
PLL
Slave TDA8752B
(odd pixels)
0 /180
MUX
SYNCHRO
COAST
CKEXT INV
CKADCO
CKAO
CKREFO
phase selector B
I
2
C-bus; 5 bits (Pb)
CKBO
CKREF
I
2
C-bus;
1 bit (Ckab)
(Ckab = 1)
MUX
MUX
NCKBO
NCKBO
I
2
C-bus;
1 bit (Ckab)
(Ckab = 0)
MUX
MUX