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S3F80P5_UM_ REV1.00 RESET
P0&P2.0
(INT0~INT5)
Noise
Filter
External Interrupt
Control Block
P0& P2.0
Enabled
INT0~INT5
SED&R
Circuit
P0
STOP
STOPCON
Back-up
Mode
Falling Edge
Detector
Enable/
Disable
STOP
STOPCON
LVD
IPOR
Rising Edge
Detector
fosc
BT
(WDT)
Falling Edge
RESE
T
RESET Contorl Bit'1'
RESET Contorl Bit'1'
STOP
STOPCON
*RESET Control Bit: smart option bit[0] @03FH
Figure 8-2. RESET Block Diagram of the S3F80P5
8-3