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S3F80P5_UM_ REV1.00 CONTROL REGISTERS
P2CONL — Port 2 Control Register (Low Byte) EDH Set1 Bank0
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
Reset Value
0 0 0 0 0 0 0 0
Read/Write
R/W R/W R/W R/W R/W R/W R/W R/W
Addressing Mode
Register addressing mode only
.1 and .0 P2.0/INT5 Mode Selection Bits
0 0 C-MOS input mode; interrupt on falling edges
0 1 C-MOS input mode; interrupt on rising edges and falling edges
1 0 Output mode; push-pull or open-drain output (refer to P2OUTMD)
1 1 C-MOS input mode; interrupt on rising edges
NOTE: Pull-up resistors can be assigned to individual port 2 pins by making the appropriate settings to the P2PUR control
register, location EEH, set 1,bank0.
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