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35
z System operating voltage includes “CPU Vcore”,
“+3.300V”, “+5.000V”, “+12.000V”.
BIOS POST Check Point List
AMIBIOS provides all IBM standard Power On Self Test (POST)
routines as well as enhanced AMIBIOS POST routines. The POST
routines support CPU internal diagnostics. The POST checkpoint
codes are accessible via the Manufacturing Test Port (I/O port 80h).
Whenever a recoverable error occurs during the POST, the system
BIOS will display an error message describing the message and
explaining the problem in detail so that the problem can be
corrected.
During the POST, the BIOS signals a checkpoint by issuing one code
to I/O address 80H. This code can be used to establish how far the
BIOS has executed through the power-on sequence and what test
is currently being performed. This is done to help troubleshoot
faulty system board.
If the BIOS detect a terminal error condition, it will halt the POST
process and attempt to display the checkpoint code written to port
80H. If the system hangs before the BIOS detects the terminal
error, the value at port 80H will be the last test performed. In this
case, the terminal error cannot be displayed on the screen. The
following POST checkpoint codes are valid for all AMIBIOS products
with a core BIOS date of 07/15/95 version 6.27 (Enhanced).
Uncompressed Initialization Codes — The uncompressed
initialization checkpoint hex codes are listed in order of execution:
Code Description
D0
NMI is disabled. CPU ID saved. INIT code checksum verification
will be started.