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SVM2608 Introduction 17
HS_CHnI+
50 Ohm
÷ 1
÷ 10
+
–
HS_CHn–
50 Ohm
÷ 1
÷ 10
DIFF TO
SINGLE
LPF
+
–
1x, 2x, 4x
OFFSET
ADJ
12 BITS
TRIG_LVL
DAC
DAC
OFFSET_LVL
SINGLE
HIGH SPEED
CHANNEL
DAC
REF_LVL
ADC
+
–
SINGLE
DIFF
TO
GLUE LOGIC
CHANNEL_1 TRIG
CHANNEL_5 TRIG
EXT_TRG
TRIG
REFERENCE
ADJ
CHNL TRIG
HS_EXT_TRIG
+
–
DAC
EXT_TRIG_LVL
CHNL TRIG
DATA &
CONTROLS
16 BITS, 10 MHz
VM2608
MAIN BOARD
16 BITS, 120 MHz
SDRAM
2 MB
TRIG_LVL
OFFSET_LVL
HS_TRIG_LVL
LS_TRIG
HS_TRIG
REF_LVL
+
–
LOW_SPEED_CHNLS
FIGURE 1-2: SVM2608 BLOCK DIAGRAM