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SVM2608 Programming 31
With a variety of systems and bridges that move the data between different bus types (i.e. VME to
PCI, VXI to PCI, etc.), in order to assist the user in determining how data is ordered, a known
floating point value of 0.12345678901234 is loaded at Power-Up in the Result Register for all
channels. Channel 0 values are listed as an illustration:
0x3FBF is written at address 0xC00028
0x9ADD is written at address 0xC0002A
0x3746 is written at address 0xC0002C
0xF4C6 is written at address 0xC0002E
By reading the value from these addresses, the user can identify the type of DATA(BYTE)
swapping that takes place in the system and modify their code accordingly. An example of how to
do the swapping is presented in
Appendix A.
DETERMINING THE REGISTER ADDRESS
A user wishes to set Channel 2 to the 1.0 V range. Data is to be captured linearly without the use
of the low pass filter or timeout control and will trigger from the positive edge of data sent to
Channel 2. To accomplish this, the user will access the Control Register for Channel 2 at register
offset 0x0058. To determine the register address, this value must be added to the base address and
A32 address of the module. In this example, it is assumed that the base address switches are set to
0x19, yielding a base address of 0x19000000. Since the user must write to a register, the function
offset is 0x00C00000.
Register Address = Module Base Address + Function Offset + Register Offset
= 0x19000000 + 0x00C00000 + 0x00000058
= 0x19C00058
By observing the bits in the Control Register, it can be determined what data value should be sent:
0x58
(Channel 2 Offset)
It is recommended that unused register bits
have 0 written to them
Disables Timeout Control
Sets the Channel for Linear Acquisition
Sets the Channel for Voltage Mode
Sets the Channel for acquisition in the 1.0 V range
Disables the 20 kHz Filter on Channel 2
Sets the channel to trigger on a Positive Slope
Selects Channel 2 as the Trigger Source
Write Reason
D6
D5
D4
D3
D2
D1
D0
D15
D14
D13
D12
D10
D11
D9
D8
D7
0
0
0
0
0
0
0
0
0
0
0
0
0
1
1
1