AMD Confidential
User Manual November 21
st
, 2008
Appendix A 201
Near jump with the target specified
reg/mem16.
Near jump with the target specified
reg/mem32.
Near jump with the target specified
reg/mem64.
Far jump direct, with the target
specified by a far pointer contained
in the instruction.
Far jump direct, with the target
specified by a far pointer contained
in the instruction.
Far jump indirect, with the target
specified by a far pointer in memory.
Far jump indirect, with the target
specified by a far pointer in memory.
Load the SF, ZF, AF, PF, and CF flags
into the AH register.
Load DS:reg16 with a far pointer from
memory.
Load DS:reg32 with a far pointer from
memory.
Load ES:reg16 with a far pointer from
memory.
Load ES:reg32 with a far pointer from
memory.
Load FS:reg16 with a far pointer from
memory.
Load FS:reg32 with a far pointer from
memory.
Load GS:reg16 with a far pointer from
memory.
Load GS:reg32 with a far pointer from
memory.
Load SS:reg16 with a far pointer from
memory.
Load SS:reg32 with a far pointer from
memory.
Store effective address in a 16-bit
register.
Store effective address in a 32-bit
register.
Store effective address in a 64-bit
register.
Set the stack pointer SP to the value
in the BP register and pop BP.
Set the stack pointer ESP to the
value in the EBP register and pop
EBP.
Set the stack pointer RSP to the
value in the RBP register and pop
RBP.
Force strong ordering of (serialize)
load operations.
Load byte at DS:rSI into AL and then
increment or decrement rSI.
Load word at DS:rSI into AX and then
increment or decrement rSI.
Load doubleword at DS:rSI into EAX
and then increment or decrement rSI.
Load quadword at DS:rSI into RAX and
then increment or decrement rSI.
Load byte at DS:rSI into AL and then
increment or decrement rSI.
Load word at DS:rSI into AX and then
increment or decrement rSI.
