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Section 6 Status Report
6.2
Status Registers Specified
by
IEEE488.2
IEEE488.2
specifies the two status registers shown below.
Table 6-2 Definitions of Status Registers Specified by IEEE488.2
Status Register Definition
Status byte register
A
register to set RQS and seven summary message bits.
Being used in combination with the service request enable register, this register sets
SQR ON when the logical OR of the two is not zero. RQS is system reserved in bit
6
and this bit reports to the external controller the presence of service request.
Standard event status register
Sets eight types of events the device will encounter as standard events.
The log~cal OR output bit is summarized and displayed in bit
5
of the status byte
register as' the
ESB
(Event Status Bit) summary message.
Standard event status Standard event
enable register status register
-
-@+-
OPC
1
----
1
NOT USED
-
2 .2
QYE
DDE
EXE
CME
NOT
PON
USED
Service request Status byte
1
enable register
-
-
register
-
jO/
NOTUSED
1
Errorlevent queue
I
Output queue
F
1
-
2
2
QUE
-
3
-
3
QUES
-
4
-
5. ---5
ESB
-
status register
OPERation
status register
. .
Logical OR
Service Request
. .
. .
. .
.
.
. .
.
. .
. .
.
. .
.
. .
. .
. . . . . .
. .
.
. .
. . . . . . .
. .
. . . .
.
.
. . . .
.
.
..
....
Generation