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Intel® ICH5 AC ’97 Controller Theory of Operation
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AC ’97 Programmer’s Reference Manual 25
2. As a result of the DMA engine reaching the Last Valid Index, no further access to memory,
therefore FIFO will not drain. This condition is an error if software is not able to update the
descriptor list before the DMA engine reaches the Last Valid Index. However, this condition
could be the natural result of the last buffer entry been processed. It is up to the software
driver to determine the final status of this condition. See also Stopping Transfers in paragraph
above.
3.3 Channel Arbitration
It is possible for up to eight ICH5 AC ’97 DMA channels to be enabled at one time. A round-robin
arbitration scheme is used to arbitrate between these channels.
3.4 Data Buffers
3.4.1 Memory Organization of Data
Samples are packed in an interleaved format: two samples for two channel (stereo), four samples
for four channels surround and six samples for six channels surround.
The actual PCM data is "left-aligned" within the container. The sample itself is justified most
significant; all extra bits are at the least-significant portion of the container. All non-valid data bits
must be set to 0. With 20 bit data, the "top" 20 bits (31-12) of the DWORD contain the data. The
bottom 12 bits (11-0) are not valid data. The sample data must be WORD aligned.
3.4.2 PCM Buffer Restrictions
Below are the memory buffer restrictions for ICH5 PCM that applies for 2-, 4-, and 6-channel
audio mode:
1. Buffer Descriptors Must Contain Integer Multiples of Framed Samples and Are Frame
Aligned:
Example: Two channel buffers must contain an integer multiple of two samples.
Four channel buffers must contain a multiple of four samples and six channel
buffers must contain a multiple of six samples. The controller does not support a
frame (e.g., left and right samples for two channel) spanning multiple
descriptors. Similarly, the controller does not support a buffer descriptor with a
single sample (PCM out MONO is not supported). Also, odd length buffers are
not allowed due to the sample alignment requirements.
2. Software Is Allowed to Create an Empty Frame (0 Samples) in a Buffer Descriptor with the
Following Restriction:
An empty buffer has to be part of a list of buffer descriptors and it cannot to be
the first Buffer Descriptor or the last Buffer Descriptor of the list. A series of
buffer descriptors with 0 samples are possible in the lists as long as they are not
the first or the last. The last Buffer Descriptor in the list is determined by the last
valid index (LVI) that is programmed.