R
4 AC ’97 Programmer’s Reference Manual
3.6.3.1
Determining the Presence of Secondary and Tertiary
Codecs.................................................................................34
3.6.3.2 Determining the Presence of a Modem Function ................35
3.6.4 Resume Context Recovery...................................................................35
3.6.5 Aggressive Power Management........................................................... 35
3.6.5.1 Primary Audio Requested to D3.......................................... 36
3.6.5.2 Secondary Modem Requested to D3...................................36
3.6.5.3 Secondary Modem Requested to D0...................................36
3.6.5.4 Audio Primary Requested to D0.......................................... 37
3.6.5.5 Using a Cold or Warm Reset............................................... 37
4 Surround Audio Support....................................................................................................39
4.1 Determine Codec’s Audio Channels..................................................................... 39
4.2 Enabling Intel
®
ICH5 AC ’97 Controller Audio Channels ......................................40
5 20-Bits PCM Support.........................................................................................................43
6 Independent S-P/DIF Output Capability............................................................................45
7 Support for Double Rate Audio .........................................................................................47
8 Independent Input Channels Capability.............................................................................49
8.1 Link Topology Determination................................................................................49
9 Intel
®
ICH5 AC ’97 Modem Driver ..................................................................................... 51
9.1 Robust Host-Based Generation of a Synchronous Data Stream .........................51
9.1.1 Spurious Data Algorithm .......................................................................52
9.1.2 Intel
®
ICH5 AC ’97 Spurious Data Implementation...............................52