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EN 55Q549.2E LA 8.
2009-May-08
8.3 Diagram SSB: PNX8543 - Stand-by Controller B04A, PNX8543 (IC7H00)
Figure 8-3 Internal block diagram and pin configuration
Block Diagram
Pin Configuration
18440_301_090303.eps
090303
TS out/in for
TS in from
CVBS, Y/C,
LVDS for
analog CVBS
analog audio
I
2
S
Dual SPDIF
Low-IF
SSIF, LR
Dual HDMI
SPDIF
CI/CA
MPEG
PRIMARY
LVDS
VIDEO
SECONDARY
MEMORY
VIDEO
3D COMB
DIGITAL IF
AUDIO DEMOD
AUDIO IN
HDMI
SCALER,
AUDIO DSP
AUDIO DACS
AUDIO OUT
300 MHz
300 MHz
I
2
C
PWM
GPIO IR ADC UART I
2
C GPIO Flash
SYSTEM
USB 2.0 CA
PNX8543x
DV INPUT
DV-ITU-656
AV-PIP
SPI
MPEG/H.264
I
2
S
RECEIVER
(8051)
CONTROLLER
AND DECODE
DECODER
channel decoder
PCMCIA
RGB
PROCESSOR
SYSTEM
CONTROLLER
DECODER
VIDEO
CPU
MIPS32 4KEc
01 x22 x
AV-DSP
REDUCTION
AND NOISE
DE-INTERLACE
OUTPUT
VIDEO
SUB-PICTURE
ENCODER
OUTPUT
VIDEO
channel)
(single or dual
flat panel display
DRAWING
ENGINE
DMA BLOCK
PCI 2.2
PNX8543xEH
Transparent top view
1917253 11 19 2771523513 21 29
426121018 26412 22308 20 28614
T
AD
H
AK
P
AB
F
AH
M
Y
D
AF
K
V
B
A
J
R
AC
G
AJ
N
AA
E
AG
L
W
C
AE
U
ball A1
index area
31
32
33
34
AL
AM
AN
AP