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EN 56 Q549.2E LA8.
2009-May-08
8.4 Diagram SSB: Ethernet B05A, PNX5120 (IC7C00)
Figure 8-4 Internal block diagram and pin configuration
18560_300_090403.eps
090403
Pin Configuration
Block Diagram
PNX51xx
Transparent top view
2468 10 12
13
14
15 17
16
19
18 20
21 23
22 24
25
26
1 3 57911
ball A1
index area
AB
AD
AA
AC
Y
W
V
U
R
N
T
P
M
L
K
J
H
F
D
G
E
C
B
A
AF
AE
LVDS RX 1
UIP L3K7
TM327x 1
CONTROLLER
PCI/XIO
I2C-DMA
UART
CPIPE L3K7
LVDS TX 2
UART
PNX51xx
I2C
I2C
TM327x 2
TM327x 3
LVDS TX 3
LVDS TX 1
LVDS TX 4
GFX
16 X GPIO
GIC 3
EJTAG
CLOCK
CAB
Video
LVDS RX 2
AUDIO IN
AUDIO OUT
GIC 1
GIC 2
MEMORY
Video