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S3F80P5_UM_ REV1.00 CONTROL REGISTERS
FMCON — Flash Memory Control Register EFH Set1 Bank1
Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0
Reset Value
0 0 0 0
− − −
0
Read/Write
R/W R/W R/W R/W
− − −
R/W
Addressing Mode
Register addressing mode only
.7− .4
Flash Memory Mode Selection Bits
0101 Programming mode
1010 Erase mode
0110
Hard Lock mode
(NOTE)
Others Not used for S3F80P5
.3− .1
Not used for S3F80P5
.0 Flash Operation Start Bit (available for Erase and Hard Lock mode only)
0 Operation stop
1 Operation start (auto clear bit)
NOTE: Hard Lock mode is one of the flash protection modes. Refer to page 13-17.
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