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10 MITSUBISHI PLC • 4
Available Memory
FX1/2, FX0N, FX1S series CPU
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1 In case of the items which can display double word data (e.g. data display, graph, sampling),
the data is managed as double word data.
Both bit data and word data are managed as lower-half 16 bits data.
Input : 16 upper-half bits are ignored.
Output : “0” is written in the 16 upper-half bits.
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2When use D1000 to 2999, select DX.
FX2N, FX1N series
*
1 In case of the items which can display double word data (e.g. data display, graph, sampling),
the data is managed as double word data.
Both bit data and word data are managed as lower-half 16 bits data.
Input : 16 upper-half bits are ignored.
Output : “0” is written in the 16 upper-half bits.
Set the memory to the extent of the memory range of each PLC model.
Use TYPE number to assign indirect memory for macro programs.
Memory TYPE Remarks
D(data register) 0
TN (timer/current value) 1
CN (counter/current value) 2
32CN (counter 32bits) 3
*
1
M(internal relay) 4
S(state) 5
X (input relay) 6 Read only
Y(output relay) 7
TS (timer/contact) 8
CS (counter/contact) 9
DX (Data register) 10
*
2
Memory TYPE Remarks
D(data register) 0
TN (timer/current value) 1
CN (counter/current value) 2
32CN (counter 32bits) 3
*
1
M(internal relay) 4
S(state) 5
X (input relay) 6 Read only
Y(output relay) 7
TS (timer/contact) 8
CS (counter/contact) 9