Filter
Top Products
Programming the DC Source - 5
49
Programming the Status Registers
Status register programming lets you determine the operating condition of the dc source at any time. For
example, you may program the dc source to generate an interrupt (SRQ) when an event such as a current
limit occurs. When the interrupt occurs, your program can act on the event in the appropriate fashion.
Figure 5-5 shows the status register structure of the dc source. Table 5-1 defines the status bits. The
Standard Event, Status Byte, and Service Request Enable registers and the Output Queue perform
standard GPIB functions as defined in the IEEE 488.2 Standard Digital Interface for Programmable
Instrumentation. The Operation Status and Questionable Status registers implement functions that are
specific to the dc source.
LOGICAL
OR
LOGICAL
OR
PON
CME
EXE
DDE
QYE
OPC
0
2
3
4
5
7
1
4
8
16
32
128
1
4
8
16
32
128
EVENT ENABLE
STANDARD EVENT
STATUS
OUTPUT QUEUE
QUEUE
NOT
EMPTY
DATA
DATA
DATA
STATUS BYTE
SERVICE
REQUEST
ENABLE
LOGICAL
OR
SERVICE
REQUEST
GENERATION
8
16
32
128
8
16
32
128
RQS
OPER
MSS
ESB
MAV
QUES
4
5
6
7
UNR
OT
OV+
0
4
QUESTIONABLE STATUS
(IDENTICAL REGISTERS FOR EACH CHANNEL)
10
Meas
Ovld
14
CONDITION
LOGICAL
OR
EVENT ENABLE
QSUMCHAN 1
SAME
AS
CHAN 1
LOGICAL
OR
PTR/NTR
1
16
1024
16384
1
16
1024
16384
1
16
1024
16384
1
16
1024
16384
OSC
12
4096
3
2
WTG
LOGICAL
OR
CHAN 2
CHAN 3
CHAN 4
QSUM
QSUM
QSUM
CHAN 2
CHAN 3
CHAN 4
OSUM
CONDITION
0
2
PTR/NTR EVENT
ENABLE
1
CV
CL+
CC
VL -
3
4
5
SAME
AS
CHAN 1
CHAN 1
OSUM
OSUM
1
32
2
4
8
16
6
64
OFF
1
32
2
4
8
16
64
1
32
2
4
8
16
64
1
32
2
4
8
16
64
OV -
1
CL -
VL+
OSUM
OPERATION STATUS
(IDENTICAL REGISTERS FOR EACH CHANNEL)
PCLR
2
44
2
44
2
22
4096
4096
4096
Figure 5-5. DC Source Status Model