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Rev. 1.0, 07/01, page 82 of 372
H'007F
H'0000 H'0001 H'0002
H'00FF
H'0080 H'0081 H'0082
H'03FF
H'0380 H'0381 H'0382
H'047F
H'0400 H'0401 H'0402
H'04FF
H'0480 H'0481 H'0481
H'07FF
H'0780 H'0781 H'0782
H'087F
H'0800 H'0801 H'0802
H'08FF
H'0880 H'0881 H'0882
H'0BFF
H'0B80 H'0B81 H'0B82
H'0C7F
H'0C00 H'0C01 H'0C02
H'0CFF
H'0C80 H'0C81 H'0C82
H'0FFF
H'0F80 H'0F81 H'0F82
H'107F
H'1000 H'1001 H'1002
H'10FF
H'1080 H'1081 H'1082
H'7FFF
H'7F80 H'7F81 H'7F82
Programming unit: 128 bytes
Programming unit: 128 bytes
Programming unit: 128 bytes
Programming unit: 128 bytes
Programming unit: 128 bytes
1 kbyte
Erase unit
1 kbyte
Erase unit
1 kbyte
Erase unit
1 kbyte
Erase unit
28 kbytes
Erase unit
Figure 7-1 Flash Memory Block Configuration
7.2 Register Descriptions
The flash memory has the following registers. For details on register addresses and register states
during each processing, refer to section 19, Internal I/O Registers.
•
Flash memory control register 1 (FLMCR1)
•
Flash memory control register 2 (FLMCR2)
•
Erase block register 1 (EBR1)
•
Flash memory power control register (FLPWCR)
•
Flash memory enable register (FENR)