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MELSEC-
A
9 PROGRAM EXAMPLES
(2) Buffer memory configuration
The buffer memory configuration for this program example is shown below.
A40H to B3FHM
940
H
to A3F
HM
920
H
to 93F
H
M
898
H to 91FHM
780
H to 91FHM
680
H
to 77F
HM
580
H to 67FHM
560
H
to 57F
HM
4D8
H
to 55F
H
M
3C0
H
to 55F
H
M
2C0
H to 3BFHM
1C0
H
to 2BF
HM
1A0
H
to 1BF
H
M
118
H to 19FHM
0
H
to 19F
H
M
R2
300H to 3FFH
R2
200H to 2FFH
R2
1A0H to 1BFH
R2
118
H
to 19F
H
R2
0
H
to 19F
H
R2
300H to 3FFH
R2
200H to 2FFH
R2
1A0H to 1BFH
R2
118
H
to 19F
H
R2
0
H
to 19F
H
R2
300H to 3FFH
R2
200H to 2FFH
R2
1A0H to 1BFH
R2
118
H
to 19F
H
R2
0
H
to 19F
H
Master station buffer memory
(Automatic update buffer (bank 2))
R2 buffer memory (1st station)
1st
station
2nd
station
3rd
station
Initialization area
Transmission area 1)
Status storage area
Reception area
Transmission area 2)
Initialization area
Transmission area 1)
Status storage area
Reception area
Transmission area 2)
Initialization area
Transmission area 1)
Status storage area
Reception area
Transmission area 2)
Initialization area (1A0
H
worth)
Transmission area 1) (88
H
worth)
Status storage area
(20
H
worth)
Reception area (100
H
worth)
Transmission area 2) (100
H
worth)
Initialization area (1A0
H
worth)
Transmission area 1) (88
H
worth)
Status storage area (20
H
worth)
Reception area (100
H worth)
Transmission area 2) (100
H
worth)
Initialization area (1A0
H
worth)
Transmission area 1) (88
H
worth)
Status storage area (20
H
worth)
Reception area (100
H
worth)
Transmission area 2) (100
H
worth)
R2 buffer memory (2nd station)
R2 buffer memory (3rd station)