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MELSEC-
A
5 PRELIMINARY INFORMATION
(1) Changing the bank when using the A Series master module
When using the A series master module (AJ61BT11/A1SJ61BT11), the master
station's automatic transmission/reception buffer will be "bank 1".
Thus, create a program that changes to "bank 1"when reading or writing to the
transmission/reception buffer, and returns to "bank 0" when the reading/writing is
completed.
When using the dedicated commands RIWT/RIRD/RISEND/RIRCV, the bank will
be changed automatically by the dedicated commands, so the user does not
need to change the bank.
Refer to section 5.2 for details on changing the bank.
5.7.2 Control data
When transmitting data using the transmission/reception buffer, the control data must
be added to the transmission data before transmitting.
When receiving data, the control data will be added to the head of the reception data.
The following examples are explained in this section for the control data.
•
Transmission buffer address (200H worth)
When using A Series master station : Bank 1
M 0H to 1FFH
When using Q/QnA Series master station : M 1000H to 11FFH
•
Reception buffer address (200H worth)
When using A Series master station : Bank 1
M 200H to 3FFH
When using Q/QnA Series master station : M 1200H to 13FFH
POINT
Refer to the following manuals for details on the control data when using the
dedicated commands (RIWT/RISEND/RIRD/RIRCV).
•
When using ACPU/QCPU-A (A mode) : AnSHCPU/AnACPU/AnUCPU
Programming Manual (Dedicated
Commands)
•
When using QnACPU : QnACPU Programming Manual (Special Function
Module)
•
When using QCPU (Q mode) : QJ61BT11N/QJ61BT11 User's Manual