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MELSEC-
A
5 PRELIMINARY INFORMATION
(a) Control data
Note that the control data differs between the QCPU (Q mode)/QnACPU
and ACPU/QCPU-A (A mode) as shown below.
When using ACPU/QCPU-A (A mode) When using QCPU (Q mode)/QnACPU
Control data Control data
One word
each
One word
each
Complete status Complete status
No. of write points (word)
No. of write points (word)
Station No.
Fixed to 0004
H
Access code, attribute
Error confirmation
Buffer memory address
Buffer memory address
(b) Interlock signal
Note that the interlock signal differs between the QCPU (Q mode)/QnACPU
and ACPU/QCPU-A (A mode) as shown below.
to
b15 b8b7 b0
0
to to
b15 b8b7 b0
to
When using ACPU/QCPU-A (A mode)
When using QCPU (Q mode)/QnACPU
Interlock signal Interlock signal
RX (Complete device)
RY (Request device)
RWr (Error code storage device)
One word
each
One word
each
Complete mode
RX (Complete device)
RY (Request device)
RWr
(Error code
storage device)