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Rev. 1.0, 07/01, page 88 of 372
Table 7-2 Boot Mode Operation
Item
Host Operation LSI Operation
Branches to boot program at reset-start.
Processing Contents Processing Contents
Bit rate
adjustment
Continuously transmits data H'00 at
specified bit rate.
· Measures low-level period of receive data H'00.
· Calculates bit rate and sets it in BRR of SCI3.
· Transmits data H'00 to the host to indicate that the
adjustment has ended.
Transmits 1-byte data H'AA to the host when data
H'55 is received.
Transmits data H'55 when data H'00
is received and no error occurs.
Transmits number of bytes (N) of
programming control program to be
transferred as 2-byte data (low-order
byte following high-order byte)
Transmits 1-byte programming
control program
Transfer of
programming control
program
Execution of
Programming
control program
Transfer of
programming control
program (repeated for
N times)
Flash memory erase
Echobacks the 2-byte received data to host.
Branches to programming control program
transferred to on-chip RAM and starts execution.
Echobacks received data to host and also
transfers it to RAM.
Checks flash memory data, erases all flash memory
blocks in case of written data existing, and transmits
data H'AA to host. (If erase could not be done,
transmits data H'FF to host and aborts operation.)
Table 7-3 System Clock Frequencies for which Automatic Adjustment of LSI Bit Rate is
Possible
Host Bit Rate System Clock Frequency Range of LSI
19,200 bps 16MHz
9,600 bps 8 to 16 MHz
4,800 bps 4 to 16 MHz
2,400 bps 2 to 16 MHz