Rev. 1.0, 07/01, page 275 of 372
Section 19 Internal I/O Registers
19.1 Register Addresses
Register Name
Abbre-
viation Bit No Address
Module
Name
Data
Bus
Width
Access
State
———
H'F000 to
H'F72F
———
Low-voltage detection control register LVDCR 8 H'F730 LVDC
*
1
82
Low-voltage detection status register LVDSR 8 H'F731 LVDC
*
1
82
———
H'F732 to
H'F747
———
I
2
C bus control register 1 ICCR1 8 H'F748 IIC2 8 2
I
2
C bus control register 2 ICCR2 8 H'F749 IIC2 8 2
I
2
C bus mode register ICMR 8 H'F74A IIC2 8 2
I
2
C bus interrupt enable register ICIER 8 H'F74B IIC2 8 2
I
2
C bus status register ICSR 8 H'F74C IIC2 8 2
Slave address register SAR 8 H'F74D IIC2 8 2
I
2
C bus transmit data register ICDRT 8 H'F74E IIC2 8 2
I
2
C bus receive data register ICDRR 8 H'F74F IIC2 8 2
———
H'F750 to
H'FF7F
———
Timer mode register W TMRW 8 H’FF80 Timer W 8 2
Timer control register W TCRW 8 H’FF81 Timer W 8 2
Timer interrupt enable register W TIERW 8 H’FF82 Timer W 8 2
Timer status register W TSRW 8 H’FF83 Timer W 8 2
Timer I/O control register 0 TIOR0 8 H’FF84 Timer W 8 2
Timer I/O control register 1 TIOR1 8 H’FF85 Timer W 8 2
Timer counter TCNT 16 H’FF86 Timer W 16
*
2
2
General register A GRA 16 H’FF88 Timer W 16
*
2
2
General register B GRB 16 H’FF8A Timer W 16
*
2
2
General register C GRC 16 H’FF8C Timer W 16
*
2
2
General register D GRD 16 H’FF8E Timer W 16
*
2
2
Flash memory control register 1 FLMCR1 8 H’FF90 ROM 8 2
Flash memory control register 2 FLMCR2 8 H’FF91 ROM 8 2