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Rev. 1.0, 07/01, Page
xxi
of
xxiv
Tables of Contents
Section 1 Overview
Table 1-1 Pin Functions ................................................................................................................4
Section 2 CPU
Table 2-1 Operation Notation......................................................................................................17
Table 2-2 Data Transfer Instructions...........................................................................................18
Table 2-3 Arithmetic Operations Instructions (1) .......................................................................19
Table 2-3 Arithmetic Operations Instructions (2) .......................................................................20
Table 2-4 Logic Operations Instructions.....................................................................................21
Table 2-5 Shift Instructions.........................................................................................................21
Table 2-6 Bit Manipulation Instructions (1)................................................................................22
Table 2-6 Bit Manipulation Instructions (2)................................................................................23
Table 2-7 Branch Instructions.....................................................................................................24
Table 2-8 System Control Instructions........................................................................................25
Table 2-9 Block Data Transfer Instructions................................................................................26
Table 2-10 Addressing Modes ..................................................................................................28
Table 2-11 Absolute Address Access Ranges ...........................................................................29
Table 2-12 Effective Address Calculation (1)...........................................................................31
Table 2-12 Effective Address Calculation (2) ..............................................................................32
Section 3 Exception Handling
Table 3-1 Exception Sources and Vector Address ......................................................................44
Table 3-2 Interrupt Wait States ...................................................................................................53
Section 4 Address Break
Table 4-1 Access and Data Bus Used..........................................................................................59
Section 5 Clock Pulse Generators
Table 5-1 Crystal Oscillator Parameters......................................................................................64
Section 6 Power-down Modes
Table 6-1 Operating Frequency and Waiting Time.....................................................................71
Table 6-2 Transition Mode after the SLEEP Instruction Execution and Interrupt Handling ......75
Table 6-3 Internal State in Each Operating Mode.......................................................................76
Section 7 ROM
Table 7-1 Setting Programming Modes ......................................................................................86
Table 7-2 Boot Mode Operation .................................................................................................88
Table 7-3 System Clock Frequencies for which Automatic Adjustment
of LSI Bit Rate is Possible..........................................................................................88
Table 7-4 Reprogram Data Computation Table ..........................................................................92
Table 7-5 Additional-Program Data Computation Table............................................................92
Table 7-6 Programming Time.....................................................................................................92