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Rev. 1.0, 07/01, page
xii
of
xxiv
Section 14 Serial Communication Interface3 (SCI3)........................................181
14.1 Features.............................................................................................................................181
14.2 Input/Output Pins..............................................................................................................183
14.3 Register Descriptions........................................................................................................183
14.3.1 Receive Shift Register (RSR) ..............................................................................184
14.3.2 Receive Data Register (RDR)..............................................................................184
14.3.3 Transmit Shift Register (TSR).............................................................................184
14.3.4 Transmit Data Register (TDR).............................................................................184
14.3.5 Serial Mode Register (SMR)................................................................................185
14.3.6 Serial Control Register 3 (SCR3).........................................................................186
14.3.7 Serial Status Register (SSR) ................................................................................188
14.3.8 Bit Rate Register (BRR) ......................................................................................190
14.4 Operation in Asynchronous Mode ....................................................................................195
14.4.1 Clock....................................................................................................................195
14.4.2 SCI Initialization..................................................................................................196
14.4.3 Data Transmission ...............................................................................................197
14.4.4 Serial Data Reception ..........................................................................................199
14.5 Operation in Clocked Synchronous Mode ........................................................................203
14.5.1 Clock....................................................................................................................203
14.5.2 SCI Initialization..................................................................................................203
14.5.3 Serial Data Transmission.....................................................................................204
14.5.4 Serial Data Reception (Clocked Synchronous Mode)..........................................206
14.5.5 Simultaneous Serial Data Transmission and Reception.......................................208
14.6 Multiprocessor Communication Function.........................................................................210
14.6.1 Multiprocessor Serial Data Transmission............................................................212
14.6.2 Multiprocessor Serial Data Reception .................................................................213
14.7 Interrupts...........................................................................................................................217
14.8 Usage Notes ......................................................................................................................218
14.8.1 Break Detection and Processing ..........................................................................218
14.8.2 Mark State and Break Detection..........................................................................218
14.8.3 Receive Error Flags and Transmit Operations
(Clocked Synchronous Mode Only) ....................................................................218
14.8.4 Receive Data Sampling Timing and Reception Margin in Asynchronous Mode 219
Section 15 I
2
C Bus Interface 2 (IIC2)................................................................221
15.1 Features.............................................................................................................................221
15.2 Input/Output Pins..............................................................................................................223
15.3 Register Descriptions........................................................................................................223
15.3.1 I
2
C Bus Control Register 1 (ICCR1)....................................................................224
15.3.2 I
2
C Bus Control Register 2 (ICCR2)....................................................................225
15.3.3 I
2
C Bus Mode Register (ICMR)...........................................................................227
15.3.4 I
2
C Bus Interrupt Enable Register (ICIER)..........................................................228
15.3.5 I
2
C Bus Status Register (ICSR)............................................................................230