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TEST:TST[:RESults]?, 102
*TST?, 103
*TRG, 106
Trigger
channels, 104
control register, 131–132
external, 54
external connections, 35
idle state, 80
ignored interrupt condition, 133
immediate, 54
process, 55
query current status, 79
setting, 54–55
software, 54
source, querying, 105
source, setting, 105
status for channels, 135
system, ABORt command, 63
system, INITiate command, 80
system, TRIGger commands, 104–105
VXIbus backplane, 54, 81–82, 132
wait-for-trigger state, 80
TRIGger Subsystem, 104–105
TRIGger:SOURce, 54–55, 105
TRIGger:SOURce?, 105
Triggering, 54–55
Troubleshooting, 173
*TST?, 53, 103, 106, 173
TTLTRG Line, 81–82, 131–132
Two-wire Connections, 33
U
Undefined Registers, 140
Using
*OPC?, 56
trigger control register, 132
V
V/I Jumper, 17, 31, 52
option A3E, 32
option A3H, 32
VI_SUCCESS, 47
viPrintf, 40, 47
VISA Transition Library
See VTL
visa.h, 39
viScanf, 40
ViStatus, 47
Voltage
adjustment, 157–158
calibration connections (CAL), 158
calibration connections (CHAN), 158
calibration path, querying, 77
calibration path, setting, 76
calibration status register, 144
channel output connections, 33
channel output connections, combining, 34, 57
channel output connections, querying, 92, 94
channel output connections, specifying, 65, 91, 93
channel output mode, 13, 45, 89
DC specifications, 111
gain calibration constant, 141
mode calibration, 72, 74–75
offset calibration constant, 140
output adjustment, 154–165
VTL, 40, 47
VXI
offset register, 128
status/control register, 127–128
VXIbus, 13
backplane circuitry, 17
backplane trigger, 54, 81–82, 132
SYSFAIL* line, 127–128
TTLTRG line, 81–82, 131–132
word serial protocol, 113
W
*WAI, 106
Wait-for-Trigger State, 80
WARNINGS, 8
Warranty, 7
Wiring Terminal Module, 23–24
Writing To
calibration card configuration register, 147
calibration checksum register, 147
calibration control register, 129
calibration isolation status register, 146
calibration resistor value registers, 144
card control register, 137
channel current gain calibration registers, 143
channel current offset calibration registers, 142
channel mode register, 136
channel relay control register, 136
channel voltage gain calibration registers, 141
channel voltage offset calibration registers, 140
current calibration status register, 145
Gain_DAC registers, 139
interrupt status register, 133
logical address register, 126
Main_DAC immediate registers, 138
Main_DAC triggered registers, 138
non-volatile (FLASH) memory, 140–143, 155
185 HP E1418A User’s Manual