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2-3. V Output
2-3-1. Circuit Operation
The V output circuit consists of a V driver circuit Q302,
Pump-up circuit and output circuit Q301, and external circuit
components.
(1) Q2 amplifies its input fed from pin 4 of Q301, Q3, Q4
output stage connected in a SEPP amplifies the cur-
rent and supplies a sawtooth waveform current to a
deflection yoke.
Fig. 8-6
Q3 turns on for first half of the scanning period and
allows a positive current to flow into the deflection
yoke (Q3 ® DY ® C306 ® R305 ® GND), and Q4
turns on for last half of the scanning period and allows
a negative current to flow into the deflection yoke
(R305 ® C306 ® DY ® Q4). These operations are
shown in Fig. 8-5.
V 3
V 7
V 2
1
4
2
7
36
Q2
Q4
BIAS
CIRCUIT
Q3
Q301
+35V
D301 C308
D308
D309 R308
DY
C306
R305
Q3 ON
Q4 ON
GND
GND
63V
35V
GND
35V
GND
63V
+
(2) In Fig. 8-6 (a), the power Vcc is expressed as a fixed
level, and the positive and negative current flowing
into the deflection yoke is a current (d) = current (b) +
(c) in Fig. 8-6, and the emitter voltage of Q3 and Q4 is
expressed as (e).
(3) Q3 collector loss is i1 x Vce1 and the value is equal to
multiplication of Fig. 8-6 (b) and slanted section of
Fig. 8-6 (e), and Q4 collector loss is equal to multipli-
cation of Fig. 8-6 (c) and dotted section of Fig. 8-6
(e).
Fig. 8-5
Power Vcc
Q3
Q4
Q2
i1
i2
Vce 1
GND (b) Q3 Collector current i1
GND (c) Q4 Collector current i2
GND (d) Deflection yoke current i1+i2
Vp
Vcc
1/2 Vcc
GND
(e)
(a) Basic circuit