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Switcher Module Description
Figure 3-3. C Bay Module Locations, Rear of Frame
CHROMA
KEY
INPUT
G/Y
B/U
R/V
J4
J5
J6
GAIN
GAIN
GAIN
G/Y
B/U
R/V
J1
J2
J3
GAIN
GAIN
GAIN
SERIAL
OUTPUT
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
SERIAL
OUTPUT
J1
J2
J3
J4
J5
J6
J7
J8
J9
J10
J11
J12
J13
J14
J15
J16
ANALOG
OUTPUT
G/Y
R/V
B/U
J1
J2
J3
PROGRAM
G/Y
R/V
B/U
J4
J5
J6
PREVIEW
SERIAL
REENTRY
SERIAL
REENTRY
COM
I/O
PANEL
EDITOR
AUX BUS
CTL
ANALOG
REF IN
J1
J2
J3
J4
J5
J6
EXPANDED
COM
PORT A1
J1
PORT B1
J2
PORT A2
J3
PORT B2
J4
PORT A3
J5
PORT B3
J6
J7
J8
GPI
MAINTENANCE
TALLY EXP
1
2
3
4
G
GPI INPUTS
J1
+5
J2
1
2
3
4
G
+5
TB1
TB2
GPI OUTPUTS
TB3
1
2
3
4
G
TB4
1
2
3
4
G
G
G
SERIAL
INPUT
SERIAL
INPUT
SERIAL
INPUT
SERIAL
INPUT
TIMED
AUX
OUTPUT
J1
J3
J5
J7
J9
J11
J13
J15
C17 C16 C15 C14 C13 C12 C11 C10 C9 C8 C7 C6 C5 C4 C3 C2 C1