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CHAPTER 5 I/O Port
■ Registers for Port 1
●
Port 1 data register (PDR1)
Figure 5.3-2 Port 1 data register (PDR1)
●
Port 1 direction register (DDR1)
Figure 5.3-3 Port 1 direction register (DDR1)
●
Port 1 function selection register (PFS1)
Figure 5.3-4 Port 1 function selection register (PFS1)
Table 5.3-1 Operation of function selection bits
Function selection bits
Register setting value
0 1
[bit7]: RT4E General-purpose port RTG output 4
[bit6]: RT3E General-purpose port RTG output 3
[bit5]: RT2E General-purpose port RTG output 2
[bit4]: RT1E General-purpose port RTG output1
[bit3]: RT0E General-purpose port RTG output0
[bit2]: General-purpose port/EC5, INT1 input Specification prohibited
[bit1]: General-purpose port/EC5, INT1 input Specification prohibited
[bit0]: General-purpose port/PMSK input Specification prohibited
7 6 5 4 3 2 1 0
XXXX XXXX
B
Initial value
bit
Access
R/W R/W R/W R/W R/W R/W R/W R/W
PD17 PD16 PD15 PD14 PD13 PD12 PD11 PD10
Address: 000002
H
7 6 5 4 3 2 1 0
0000 0000
B
Initial value
bit
WWWWWWWW
DR17 DR16 DR15 DR14 DR13 DR12 DR11 DR10
Address: 00000A
H
Access
7 6 5 4 3 2 1 0
0000 0000
B
Initial value
bit
WWWWWWWW
RT4E RT3E RT2E RT1E RT0E
Address: 000602H
Access